Thanks @Sat, @timk11 and @SvenF, the proposed way forward sounds good. I also think the change to the tooling sounds like a good move. Thanks for turning that around so quickly @Sat!
On a related note, I’ve posted some progress that I’ve made in exploring alternative means of optimising the IC topology. I may not have time to make progress on this for a while, so I wanted to share what I have so far in case anyone else fancies pushing this forward, or is able to provide some early feedback.